[R-sig-hpc] CFP [Extended Deadline] : IEEE 32nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD2020) - Deadline Extended (May 22, 2020)

Carlos Ferreira cg| @end|ng |rom |@ep@|pp@pt
Fri May 15 17:09:00 CEST 2020


32nd IEEE International Symposium on Computer Architecture and High Performance Computing
September 8-11, 2020
Porto, Portugal
sbac2020 using dcc.fc.up.pt

http://www2.sbc.org.br/sbac/ (Historical acceptance rate).

** NEW ** SBAC-PAD2020 will be held online (synchronous and/or asynchronous)

We are monitoring the Coronavirus disease (COVID-19) outbreak and
following the recommendations/guidelines from the World Health
Organization (WHO) and the European Centre for Disease Prevention and
Control (ECDC).

The safety of all conference participants is our main priority. In
this perspective, regardless of the outbreak outcomes in September, we
will make SBAC-PAD2020 an online (synchronous and/or asynchronous)
event and we will maintain the regular publication activities, i.e.,
accepted papers will be eligible for publication at the IEEE Xplore
and the authors of the selected papers will be invited to submit an
extended version of their work for publication on the Journal of
Parallel and Distributed Computing (JPDC).

The assessment of the outbreak's impact will be done until July,
31st. By that time, we will make an announcement, on the
SBAC-PAD2020's webpage, about its schedulement.

Stay safe!

Aims and Scope

SBAC-PAD is an international symposium, started in 1987, which has
continuously presented an overview of new developments, applications,
and trends in parallel and distributed computing
technologies. SBAC-PAD is open for faculty members, researchers,
specialists and graduate students around the world.

In this edition, the symposium will be held at the University of
Porto, Porto, Portugal. The city of Porto is famous for its Port wine
and beautiful scenery, architecture and cultural events. More
information about the conference can be found at

Paper Submission

Authors are invited to submit original manuscripts on a wide range of
high-performance computing areas, including computer architecture,
systems software, languages and compilers, algorithms and

Topics of interest include (but are not limited to):
  -Application-specific systems
  -Architecture and Programming Support for Emerging Domains (Big Data, Deep Learning)
  -Benchmarking, performance measurements, and analysis
  -Cloud, Grid, cluster, and peer-to-peer systems
  -Embedded and pervasive systems
  -GPUs, FPGAs and other accelerator architectures
  -Languages, compilers, and tools for parallel and distributed programming
  -Modeling and simulation methodology
  -Operating systems and virtualization
  -Parallel and distributed systems, algorithms, and applications
  -Power and energy-efficient systems
  -Processor, cache, memory, storage, and network architecture
  -Real-world applications and case studies
  -Reconfigurable, resilient and fault-tolerant systems

Submissions must be in English, 8 pages maximum, following the IEEE
conference formatting guidelines. To be published in the conference
proceedings and to be eligible for publication at the IEEE Xplore, at
least one of the authors must register at the full rate and present
her/his work.

Authors may not use a single registration for multiple papers. Authors
of selected papers will be invited to submit extended versions of
their papers for publication on the Journal of Parallel and
Distributed Computing.

Paper submission will be done through EasyChair:

Important Dates

Abstract deadline: May 22, 2020
Paper deadline: May 29, 2020
Reviewing period: May 30 - June 28, 2020
Rebuttal period: June 29 - July 4, 2020
Author notification: July 6, 2020
Camera-ready submission: July 13, 2020

Organizing Committee

General Chairs
Inês Dutra, ines using dcc.fc.up.pt (University of Porto, Portugal)
Jorge Barbosa, jbarbosa using fe.up.pt (University of Porto, Portugal)
Miguel Areias, miguel-areias using dcc.fc.up.pt (University of Porto, Portugal)

Program Co-chairs
Jorge Barbosa (University of Porto, Portugal)
Laurent Lefévre (Inria, ENS Lyon, University of Lyon, France)
Lucia Drummond (Universidade Federal Fluminense, Brazil)

Track Chairs
Computer Architecture
   Chair: José Moreira, IBM Thomas J. Watson Research Center, USA
     Edson Borin, University of Campinas, Brazil
     Felipe França, State University of Rio de Janeiro, Brazil
     Gabriel Falcão, University of Coimbra, Portugal
     Jairo Panetta, Aeronautics Institute of Technology, Brazil
     Jean-Luc Gaudiot, University of California, USA
     Jose Reyes, University of Glasgow, UK
     Leandro Santiago, Federal Fluminense University, Brazil
     Lluc Alvarez, Barcelona Supercomputing Center, Spain
     Nuno Roma, University of Lisbon, Portugal
     Peter Hofstee, IBM Austin Research Laboratory, USA
     Rodolfo Azevedo, University of Campinas, Brazil
     Serif Yesil, University of Illinois, USA
     Wagner Meira, Federal University of Minas Gerais, Brazil

Networking and Distributed Systems
   Chair: Jesús Carretero, University Carlos III of Madrid, Spain
     Alexey Lastovetsky, University College Dublin, Ireland
     Angelos Bilas, FORTH-ICS and University of Crete, Greece
     Bruno Schulze, National Laboratory for Scientific Computing (LNCC), Brazil
     Carla Osthoff Barros, National Laboratory for Scientific Computing (LNCC), Brazil
     Domenico Talia, University of Calabria, Italy
     Emmanuel Jeannot, INRIA, France
     Jose Luis Gonzalez, Instituto Tecnológico de Ciudad Valles (ITV), México
     Leonel Sousa, Universidade de Lisboa, Portugal
     Marco Aldinucci, University of Torino, Italy
     Silvina Caino, University of Tennessee, USA

Parallel Applications and Algorithms
   Chair: Alba Melo, University of Brasília, Brazil
     Alfredo Goldman, University of São Paulo, Brazil
     Ananth Kalyanaraman, Washington State University, USA
     Anne Benoit, ENS Lyon‐LIP, France
     Antonio J. Peña, Barcelona Supercomputing Center (BSC), Spain
     Bertil Schmidt, University of Mainz, Germany
     Cristiana Bentes, State University of Rio de Janeiro, Brazil
     Cristina Boeres, Federal Fluminense University, Brazil
     Edson Caceres, Federal University of Mato Grosso do Sul, Brazil
     George Teodoro, Federal University of Minas Gerais, Brazil
     Gianfranco Bilardi, University of Padova, Italy
     Jose Nelson Amaral, University of Alberta, Canada
     Luciana Arantes, Université Pierre et Marie Curie-Paris, France
     Ricardo Rocha, University of Porto, Portugal
     Viktor Prasanna, University of Southern California, USA

Performance Evaluation
   Chair: Ariel Oleksiak, Poznań Supercomputing and Networking Center, Poland

System Software
   Chair: Jidong Zhai, Tsinghua University, China
     Ang Li, Pacific Northwest National Laboratory, USA
     Chi Zhou, Shenzhen University, China
     Christoph Kessler, Linköping University, Sweden
     Clemens Grelck, University of Amsterdam, Netherlands
     Dandan Song, Beijing Institute of Technology, China
     Dazhao Cheng, University of North Carolina at Charlotte, USA
     Feng Zhang, Renmin University of China, China
     Guangyu Sun, Peking University, China
     Haikun Liu, Huazhong University of Science and Technology, China
     Mingyu Gao, Tsinghua University, China
     Pradeep Kumar, William & Mary, USA
     Quan Chen, Shanghai Jiaotong University, China
     Shanjiang Tang, Tianjin University, China
     Shigang Li, ETH Zurich, Switzerland
     Teng Yu, Tsinghua University, China
     Zeyi Wen, National University of Singapore, Singapore
     Zhaoguo Wang, Shanghai Jiaotong University, China

Carlos Ferreira

ISEP | Instituto Superior de Engenharia do Porto
Rua Dr. António Bernardino de Almeida, 431
4249-015 Porto - PORTUGAL
tel. +351 228 340 500 | fax +351 228 321 159
mail using isep.ipp.pt | www.isep.ipp.pt

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